高性能multi-bit delta-sigma音频ADC
100分贝的信噪比
-85 dB THD+N
3个Vpp模拟输入
24位,8至200 kHz采样频率
I2S/PCM主或从模式数据接口
支持TDM
256/384Fs, USB 12/24 MHz和其他非标准音频系统时钟
低功耗待机模式
Soundbar
音频接口
数字电视
A/V接收器
DVR
NVR
PIN NAME | PIN NUMBER | I/O | DESCRIPTION |
CCLK, CDATA | 24, 23 | I/O | I2C clock and data |
AD0, AD1 | 22, 9 | I | I2C addresses |
MCLK | 1 | I | Master clock |
SCLK | 7 | I/O | Serial data bit clock |
LRCK | 8 | I/O | Serial data left and right channel frame clock |
TDMIN | 3 | I | TDM data in |
SDOUT | 4 | O | Serial data output |
AINL1, AINR1 AINL2, AINR2 AINL3, AINR3 AINL4, AINR4 | 13, 15 12, 19 11, 20 10, 21 | I | Analog left and right inputs |
VDDP | 2 | I | Power supply for the digital input and output |
VDDD/GNDD | 6, 5 | I | Digital power supply |
VDDA/GNDA | 16, 17 | I | Analog power supply |
REFP | 18 | O | Filtering capacitor connection |
REFQ | 14 | O | Filtering capacitor connection |
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